1. Field of the Invention
The present invention relates to the field of memory management in computer systems. More specifically, the present invention relates to the optimization of memory address translation.
2. Related Art
Memory management is an important facet in the operation of modern computer systems. In particular, efficient memory management is a crucial factor to high performance in today's computer systems. Accordingly, much effort has been expended towards improving the efficiency of memory management, especially with respect to the efficiency of memory-related operations and representations.
One important instance of memory management involves the translation, or mapping, of a memory address from one address space to another address space. An address space delineates a range of memory addresses which a computer system can access under defined circumstances. Typically, multiple address spaces are used in a modern computing environment. For example, when a virtual address is referenced, it is often necessary to identify the physical address corresponding to the virtual address so that the contents at the physical memory location represented by the virtual address can be accessed. In this case, the virtual address of a virtual address space needs to be translated to the underlying physical address of a physical address space.
Generally, software and hardware systems frequently have to translate one synthetic address to a physical address or to another synthetic address. In this context, a synthetic address is a memory address based on an abstract index and an offset. Synthetic addresses within a given synthetic address space share the same abstract index but each has a different offset. Examples of synthetic addresses include virtual addresses and addresses used for remote direct memory access (remote DMA, or RDMA) operations between different computer systems.
In prior art methods for performing address translation or memory mapping, a table-based lookup is generally a required step. For example, a hash table, a page table, or another kind of table is used to store the relationship between a source address and its target address. Whenever an address translation is triggered by an operation requesting access to a source address representing a target address, a table lookup step has to be performed. This step is performed in order to retrieve the target address that corresponds to the source address so that the memory access request can be serviced. Typically, the table lookup step is required every time an address needs to be translated under the prior art.
However, these prior art methods are inefficient because performing a table lookup is expensive both in terms of computational time and space requirement. Under these prior art methods, every address translation requires a table lookup, thus the time and area requirements increase as the number of translations performed becomes larger. Consequently, these prior art methods are far from ideal in systems implementing DMA, where numerous address translations are routinely performed. The inefficiency inherent in these prior art methods is further aggravated in modern computer systems having multiple hosts and with remote DMA implemented, since even more extensive address translations are typical in such an environment. These prior art methods are therefore not well suited to the implementation of modern high speed computer systems.
Thus, there exists a need for a method and system for performing memory address translations with minimal overhead computations, thereby providing improved efficiency and performance enhancement over the prior art in order to meet the ever-increasing performance demand of modern high performance systems.